Winbond D25 1Gb LPDDR4 is designed with a function called as Chip ID Read (CIDR) function for
customer to identify the unique ID of each chip.
Further to the datasheet, this application note discloses the detail description of CIDR function for
customer easy to use the function for purpose requested by specific application.
CIDR function is able to be enabled as below sequence after power up.
The chip ID read function must be enabled before chip ID readout. The chip ID enable sequence is
executed after power on. It must be executed consecutive MR9 with different OP code. The deselect
command must be executed after each MR9. Following is the CIDR enable sequence.
Once CIDR function is enabled, follow Chip ID read sequence, the chip ID will be read out by consecutive
MR9 with different OP code. deselect command must be executed after each MR9. The Mode Register
Read (MRR) command is used to read configuration and status data from the LPDDR4-SDRAM registers.
The mode register contents are available on the first 8UI's data bits of DQ. Each MRR group is 32 data
bits, Total 96 data bits can be readout by 3 group. Following is the Chip ID read sequence.
The Chip ID disable sequence be excused after chip ID readout. It must be executed consecutive MR9 with
different OP code. The deselect command must be executed after each MR9, Following is the CIDR enable
The chip ID code is valid from 0 to 72 bit when chip ID code be readout, and those bits after the 73th bit are
don’t care. 10 of the 72 bits are invalid code with ECC. The table shown as below is the decode rule when
chip ID being readout.
The CHIP ID is correctly readout under below conditions.