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APPLICATION NOTE

How to work with Winbond Serial NAND Flash build-in ECC

Introduction

Winbond Serial NAND Flash family has built-in ECC engine that can be used to preserve the data integrity. Internal ECC calculation is done during page programming and put the ECC parity code in the dedicated address of the extra 64 bytes area (spare area) of each page. ECC engine verifies data values by the ECC parity code and to make necessary correction during the page read operation.

As above, the built-in ECC engine generate the ECC parity code of the whole 2Kbyte page data at one time. If there is partial page program, the built-in ECC engine also generate the ECC parity code for the unused address and update to the dedicated address in spare area.

Basically, Flash memory cell can’t be changed from “0” logic state to “1” logic state by program operation. It means the ECC parity code of the second partial page program cannot overwrite the dedicated address in spare area. It is called “over program issue.

This document shows how to program the data to Serial NAND correctly while the built-in ECC engine is active.

Blank page copy

To conduct BBM (bad block management), bad block skip and maintain spare block are common method. Software designer would build up a partition table for NAND Flash memory and send the table with binary code to programmer or ISP tool for downloading.

Over program issue would come up if the programmer or ISP tool program “blank page”, which means all of the 2112Byte data are “FFh”. During this operation, built-in ECC engine generate the ECC parity code of the first 2048byte and update it on dedicated addresses in spare area, show in fig 1. In this situation, the whole programmed page is not blank. It makes the mismatch between the binary code and actual device. File system use the blank area as an erased status and program data without erase. However, the actual reserve area has been programmed with “blank” data and the ECC parity code. It would makes the file system may over program the code to this page and make the data and ECC parity code mismatch. Please check Fig.2 for this issue.

To prevent this over program issue, we suggest to check the page data before programming. If the data in whole page is blank, one easy way is to skip programming this page. The other way is to turn off the build-in ECC engine before program by setting the ECC-E bit to 0 in status register-2 show in fig 3

Fig.1 W25N01GV Flash Memory architecture and addressing

Fig.2 Blank page copy issue

7.2 Configuration Register / Status Register-2 ( Volatile Writable)

Fig.3 Status register-2 bit information

Revision History

Trademarks

Winbond, SpiFlash and SpiStack are trademarks of Winbond Electronics Corporation.

All other marks are the property of their respective owner.

Important Notice

Winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or sustain life. Furthermore, Winbond products are not intended for applications wherein failure of Winbond products could result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales.

Information in this document is provided solely in connection with Winbond products. Winbond reserves the right to make changes, corrections, modifications or improvements to this document and the products and services described herein at any time, without notice.

AN0000040

Publication Date: September 01, 2020 Revision 1.0