NAU86100YG

The NAU86100YG implements a single channel FXS telephone line interface optimized for short loop applications. It integrates SLCC (Subscriber Line Control Circuit) functionality with a programmable CODEC and a DC/DC controller and SLFC (Subscriber Line Feed Circuit). The NAU86100YG supports internal Ringing up to 90 VPK (4 REN up to 55 Vrms) ideal for Customer Premise Equipment (CPE). The CODEC can be configured for μ-law, A-law or 16-bit linear PCM encoding. It also supports a comprehensive set of signaling capabilities required to supervise and control the telephone lines. These include tone generation, ring tones, DTMF detection/ generation as well as FSK generation. An on-chip Pulse Width Modulation (PWM) driver allows control of an inductor-based DC/DC converter. Programmable impedance and trans-hybrid balancing allow for worldwide deployment.

Target Applications:

•Residential VoIP Gateways / Routers / IP-PBX 
•Analog Telephone Adapter (ATA) 
•Integrated Access Device
•Set Top Box 

Key Features:

•Complete BORSCHT functions
•Internal balanced and unbalanced ringing up to 55 Vrms (4 REN)
•Integrated Power Management Options
 
-Integrated DC/DC controller regulates battery voltage to minimize power dissipation in all operating modes
 
-Programmable external battery switching
 
 
•Programmable linefeed characteristics
 
-Ringing Frequency, Amplitude, and Cadence
 
-Trapezoidal and Sinusoidal waveforms
 
-Two wire AC impedance, and trans-hybrid balance
 
-Constant Current feed (5 mA to 45 mA)
 
-Ring Trip and Loop Closure Thresholds
 
-Ground Key Detection and Ground Start
 
-Ground Fault Detection
 
 
 
•Programmable signal generation and detection
 
-DTMF generation/ detection and Tone generation
 
-Frequency Shift Keying (FSK) Enhanced Caller ID generation (Type I and Type II)
 
 
 
•Loop test and diagnostics support
 
-Integrated loopback modes
 
-Real-time linefeed monitoring
 
-On-chip temperature sensor
 
-Line Card Diagnostics Support
 
 
 
•Digital interfaces
 
-PCM: G.711 μ-Law, A-Law and 16-bit linear
 
-SPI bus
 
-Programmable audio path gains
 
 
 
•On-chip PLL for flexible clocking options including 1.0 MHz and 2.0 MHz BCLK operation
 
 
 
•Wideband and Narrowband CODEC
 
 
 
•Operating Characteristics
 
 
Digital I/O Voltage range: 1.8V ~ 3.3V
 
 
Temperature range: -40°C ~ 85°C
 
 
 
•Package
 
-QFN44